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Imagination adds safety, resilience to processor for IoT

Peter Sayer | June 15, 2017
If your industry requires components to be 'functionally safe,' Imagination has a high-powered processor for you.

mips i6500 f block diagram
Credit: Imagination Technologies

Picture this: The networking stack on the main pump controller has crashed, and you need to reboot it -- but it's 20 meters underground, on another continent -- and there's no-one on site to hit 'reset'.

Or you're bowling along the highway and one of the processor cores in your self-driving car gets zapped by a cosmic ray (yes, this could actually happen). The software can't tell whether the resulting error is a transient glitch or a hardware fault, so limits you to 50 kilometers per hour for safety: No fun with a monster truck hurtling up behind you.

Chip designers such as ARM and Imagination Technologies are applying industrial safety design techniques to their processor cores so that they can get themselves out of situations like this. You could soon feel the benefit even if you don't run a subterranean pumping station in Azerbaijan, nor yet have a self-driving car in your garage.

 

Functionally safe

We place a lot of faith in the processors in our internet of things, counting on the software they run to perform to spec in all circumstances. But there are problems that no amount of bounds checking, input sanitization or exception handling can fix.

That's why manufacturers in many industries seek to make their products functionally safe -- that is, ensuring that they remain in a safe state and respond as expected, regardless of environment, inputs or hardware failures. There are even standards for how to do so: The generic IEC 61508 has variants for specific industries, including ISO 26262 for automotive manufacturing.

It's one thing building such a system when you're designing or specifying every detail of every component yourself. Relying on an external suppliers for complex subsystems -- or your suppliers' supplier in the case of microprocessors designed by one company and built by another -- is something else entirely.

The standards describe how to incorporate such components -- known as safety elements out of context (SEooCs) -- into functionally safe systems, and companies such as ARM and Imagination Technologies are applying them to their processor cores designs.

ARM has offered functionally safe variants of some of its Cortex-R series processor designs for a couple of years now. These are processor cores designed for hard real-time applications, where a response must come within a fixed window of time. The blazing fast cores that you will find in computer vision applications or the latest flagship smartphones, though, are more likely to belong to the Cortex-A line, none of which are available in functionally safe variants.

Imagination has a competing line of low-power core designs based on the MIPS architecture, which have also found their place in computer vision applications -- although sadly for Imagination, not in smartphones.

 

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